The disclosed invention is directed generally to hybrid multilayer circuit structures, and is directed more particularly to hybrid multilayer circuit structures having resistors formed in the vias thereof.
Hybrid multilayer circuit structures, also known as hybrid microcircuits, implement the interconnection and packaging of discrete circuit devices, and generally include a unitized multilayer circuit structure formed from a plurality of integrally fused insulating layers (e.g., ceramic layers) having conductor traces disposed therebetween. The discrete circuit devices (e.g., integrated circuits) are commonly mounted on the top insulating layer so as not to be covered by another insulating layer or on a insulating layer having die cutouts formed thereon to provide cavities for the discrete devices. Passive components such as capacitors and resistors can be formed on the same layer that supports the discrete devices, for example, by thick film processes, or they can be formed between the insulating layers, for example, also by thick film processes. Electrical interconnection of the conductors and components on the different layers is achieved with vias or holes appropriately located and formed in the insulating layers and filled with conductive via fill material, whereby the conductive material is in contact with predetermined conductive traces between the layers that extend over or under the vias.
The traditional thick film process for making resistors involves screen printing of resistive ink in a horizontal pattern where length, width and thickness are controlled to define resistance value.
A consideration with screen printed resistors is the difficulty in controlling their values, and the requirement for precision capacitors is met by mounting discrete resistors on the top insulating layer along with other discrete devices, and/or by forming screen printed resistors on the top layer which are trimmed, for example, by laser or abrasive trimming. The requirement for precision capacitors has also been met by formation and trimming of buried screen printed resistors, as disclosed in commonly assigned U.S. Pat. No. 4,792,779.
A further consideration with screen printed resistors as well as discrete resistors is the substrate area utilized by such components.